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DFMSim's Mission is to provide versatile and user friendly software tools to simulate the key and critical semiconductor process steps in S/C manufacturing that are the major causes of 'systematic defects' which at sub 90nm dimensions result in ultimate process and device yield losses and also cause increased yield learning cycles very detrimental and costly to the current business needs of the whole S/C industry.

Our process simulation tools will allow engineers to quickly define the 'acceptable yield' window for all critical input parameters in a key process. Once this process window is defined, it will be used in DFMSim's device simulations to accurately predict and model real timing solutions versus today's 'worst case analyses' through use of our proprietary algorithms.

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